In many memory devices, including random access memory (RAM) devices, data is typically accessed by supplying an address to an array of memory cells and then reading data from the memory cells that reside at the supplied address. However, in content addressable memory (CAM) devices, data within a CAM array is not accessed by initially supplying an address, but rather by initially applying data (e.g., search words) to the array and then performing a search operation to identify one or more entries within the CAM array that contain data equivalent to the applied data and thereby represent a “match” condition. In this manner, data is accessed according to its content rather than its address. Upon completion of the search operation, the identified location(s) containing the equivalent data is typically encoded to provide an address (e.g., block address+row address within a block) at which the matching entry is located. If multiple matching entries are identified in response to the search operation, then local priority encoding operations may be performed to identify a location of a best or highest priority matching entry. Such priority encoding operations frequently utilize the relative physical locations of multiple matching entries within the CAM array to identify a highest priority matching entry. An exemplary CAM device that utilizes a priority encoder to identify a highest priority matching entry is disclosed in commonly assigned U.S. Pat. No. 6,370,613 to Diede et al., entitled “Content Addressable Memory with Longest Match Detect,” the disclosure of which is hereby incorporated herein by reference. Additional CAM devices are described in U.S. Pat. Nos. 5,706,224, 5,852,569 and 5,964,857 to Srinivasan et al. and in U.S. Pat. Nos. 6,101,116, 6,256,216 and 6,128,207 to Lien et al., assigned to the present assignee, the disclosures of which are hereby incorporated herein by reference.
High capacity CAM devices may also include large numbers of CAM arrays therein, with one or more CAM arrays being treated as a CAM array block. Each CAM array block may be loaded with entries of a particular priority class or the entries within a particular CAM array block may be arranged in groups (e.g., sectors) having different priority classes. The CAM array blocks may also be treated as having respective “hard” priorities that are based on the physical location of a respective block within the CAM device. In this manner, entries associated with a particular priority class may be loaded into a CAM array block(s) having a corresponding hard priority associated therewith. Unfortunately, this conventional allocation of entries of different priority classes within a CAM device may use inefficient and time consuming reloading operations in the event previously loaded entries need to be reallocated among the CAM array blocks. Such reallocation operations may be necessary as new entries are added to the CAM device or as the priorities of one or more classes of entries change over time.
Thus, notwithstanding the use of hard priority techniques to allocate entries of different priority classes within high capacity CAM devices, there continues to be a need for improved priority techniques that can allocate entries more efficiently.